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15 kv esd protected, 3.3 v single-channel rs-232 line driver/receiver adm3101e rev. c information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2007C2008 analog devices, inc. all rights reserved. features 460 kbps data rate 1 tx and 1 rx meets eia/tia-232e specifications 0.1 f charge pump capacitors contact discharge: 8 kv air gap discharge: 15 kv applications general-purpose rs-232 data links industrial/telecommunications diagnostics ports functional block diagram adm3101e gnd +3.3v inpu t + + + c1 0.1f 16v c2 0.1f 16v + + t r +3.3v to +6.6v voltage doubler +6.6v to ?6.6v voltage inverter c1+ c1? c2+ c2? t in r out cmos input cmos output r in v cc v+ v? t out c5 0.1f c3 0.1f 6.3v c4 0.1f 16v eia/tia-232e output eia/tia-232e input* *internal 5k ? pull-down resistor on the rs-232 input. 0 6766-001 figure 1. general description the adm3101e is a high speed, single-channel, rs-232/ itu-t v.28 transceiver interface device that operates from a single 3.3 v power supply. low power consumption makes it ideal for battery-powered portable instruments. the adm3101e conforms to the eia/tia-232e and itu-t v.28 specifications and operates at data rates of up to 460 kbps. all rs-232 (t out and r in ) and cmos (t in and r out ) inputs and outputs are protected against electrostatic discharges (up to 15 kv esd protection). because of the 15 kv esd protection of the adm3101e input/output pins, this device is ideally suited for operation in electrically harsh environments or where rs-232 cables are frequently plugged and unplugged. four external 0.1 f charge pump capacitors are used for the voltage doubler/inverter permitting operation from a single 3.3 v supply. the adm3101e is available in both a 12-lead lfcsp and 16-lead qsop, specified over the ?40c to +85c temperature range.
adm3101e rev. c | page 2 of 12 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagram .............................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 4 esd caution .................................................................................. 4 pin configurations and function descriptions ............................5 typical performance characteristics ..............................................6 theory of operation .........................................................................8 circuit description .......................................................................8 high baud rate ..............................................................................8 outline dimensions ..........................................................................9 ordering guide .............................................................................9 revision history 7/08rev. b to rev. c changes to general description section ...................................... 1 reformatted table 1 ......................................................................... 4 change to t in rating, table 2 ......................................................... 4 changes to figure 2 .......................................................................... 5 moved high baud rate section ...................................................... 8 added exposed pad notation to outline dimensions ............... 9 12/07rev. a to rev. b added 16-lead qsop package (universal) ................................... 1 updated outline dimensions ....................................................... 10 changes to ordering guide .......................................................... 10 10/07rev. 0 to rev. a changes to figure 1 ........................................................................... 1 changes to table 1, rs-232 receiver section ................................ 3 changes to table 3 ............................................................................. 5 changes to figure 11 ......................................................................... 8 5/07revision 0: initial version
adm3101e rev. c | page 3 of 12 specifications v cc = 3.3 v 0.3 v, c1 to c4 = 0.1 f, ?40c t a +85c, unless otherwise noted. table 1. parameter test conditions/comments min typ max unit dc characteristics operating voltage range 3.0 3.3 5.5 v power supply current, v cc no load 1.5 2.6 ma r l = 3 k to gnd 5 7 ma logic input logic threshold low, v inl t in 0.6 v input logic threshold high, v inh t in 1.4 v input logic threshold low, v inl t in , v cc = 5.0 v 0.5 v 0.8 v input logic threshold high, v inh t in , v cc = 5.0 v 0.5 v 2.0 v cmos output voltage low, v ol i out = 1.6 ma 0.4 v cmos output voltage high, v oh i out = ? 1 ma v cc ? 0.6 v logic pull-up current t in = gnd to v cc 5 12 a rs-232 receiver eia/tia-232e input voltage range 1 ?30 +30 v eia/tia-232e input threshold low v cc = 3.0 v to 5.5 v 0.6 1.3 v eia/tia-232e input threshold high 1.6 2.4 v eia/tia-232e input hysteresis 0.4 v eia/tia-232e input resistance 3 5 7 k transmitter output voltage swing rs-232 v cc = 3.3 v to 5.5 v; transmitter output loaded with 3 k to ground 5.0 5.7 v rs-562 v cc = 3.0 v 4.5 v transmitter output resistance v cc = 0 v, v out = 2 v 1 300 rs-232 output short-circuit current 15 ma timing characteristics maximum data rate v cc = 3.3 v, r l = 3 k to 7 k, c l = 50 pf to 1000 pf 460 kbps receiver propagation delay t phl 0.4 s t plh 0.4 s transmitter propagation delay r l = 3 k, c l = 1000 pf 600 ns transmitter skew 80 ns receiver skew 70 ns transition region slew rate +3 v to ?3 v or ? 3 v to +3 v, v cc = +3.3 v, r l = 3 k, c l = 1000 pf, t a = 25c 1 5.5 10 30 v/s esd protection rs-232 and cmos i/o pins human body model air discharge 15 kv human body model contact discharge 8 kv 1 guaranteed by design.
adm3101e rev. c | page 4 of 12 absolute maximum ratings t a = 25c, unless otherwise noted. table 2. parameter rating v cc ?0.3 v to +6 v v+ (v cc ? 0.3 v) to +13 v v? +0.3 v to ?13 v input voltages t in ?0.3 v to (v cc + 0.3 v) r in 30 v output voltages t out 15 v r out ?0.3 v to (v cc + 0.3 v) short-circuit duration t out continuous package information ja , thermal impedance (lfcsp) 61.1c/w ja , thermal impedance (qsop) 149.97c/w operating temperature range industrial (a version) ?40c to +85c storage temperature range ?65c to +150c pb-free temperature (soldering, 10 sec) 260c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution
adm3101e rev. c | page 5 of 12 pin configurations and function descriptions 06766-002 1 c1+ 2r out 3t in 9r in 8t out 7v? 4 v + 5 v c c 6 g n d 1 2 c 1 ? 1 1 c 2 + 1 0 c 2 ? pin 1 indicator adm3101e top view (not to scale) notes 1. paddle connected to gnd. this connection is not required to meet the electrical performances. figure 2. lfcsp pin configuration 06766-014 nc = no connect 1 2 3 4 5 6 7 8 c1+ nc r out v+ nc t in c1? v cc 16 15 14 13 12 11 10 9 c2? nc r in v? gnd nc t out c2+ top view (not to scale) adm3101e figure 3. qsop pin configuration table 3. pin function descriptions pin no. mnemonic description lfcsp qsop 1, 12 2, 1 c1+, c1? positive and negative connections for charge pump capacitor. external capacitor c1 is connected between these pins; a 0.1 f capacitor is recommended, but larger capacitors up to 10 f can be used. 2 4 r out receiver output. this pin outputs cmos output logic levels. 3 5 t in transmitter (driver) input. this input accepts ttl/cmos levels. 4 7 v+ internally generated positive supply (+6 v nominal). 5 8 v cc power supply input, 3.0 v to 5.5 v. 6 9 gnd ground. must be connected to 0 v. 7 10 vC internally generated negative supply (?6 v nominal). 8 12 t out transmitter (driver) output. this pin outputs rs-232 signal levels (typically 6 v). 9 13 r in receiver input. this input accepts rs-232 signal leve ls. an internal 5 k pull-down resistor to gnd is connected on the input. 10, 11 15, 16 c2?, c2+ positive and negative connections for charge pump capacitor. external capacitor c2 is connected between these pins; a 0.1 f capacitor is recommended, but larger capacitors up to 10 f can be used. n/a 3, 6, 11, 14 nc no connect. these pins should always remain unconnected.
adm3101e rev. c | page 6 of 12 typical performance characteristics 8 ?8 0 1000 load capacitance (pf) tx output (v) 6 4 2 0 ?2 ?4 ?6 200 400 600 800 v cc = 3.3v 06766-003 tx output low tx output high figure 4. transmitter output voltage high/low vs. load capacitance @ 460 kbps 15 ?15 36 v cc (v) tx output (v) 10 5 0 ?5 ?10 45 06766-004 tx output high tx output low figure 5. transmitter output voltage high/low vs. v cc , r l = 3 k 8 ?8 0 load current (ma) tx output (v) 6 4 2 0 ?2 ?4 ?6 1234 v cc = 3.3v tx output low tx output high 06766-005 figure 6. transmitter output voltage high/low vs. load current 8 ?8 load current (ma) voltage (v) 6 4 2 0 ?2 ?4 ?6 0 24 v+ v? v cc = 3.3v 06766-006 13 figure 7. charge pump v+, v? vs. load current 350 0 36 v cc (v) charge pump impedance ( ? ) 300 250 200 150 100 50 45 v? v+ 06766-007 figure 8. charge pump impedance vs. v cc 14 0 0 1000 load capacitance (pf) i dd (ma) 12 10 8 6 4 2 200 400 600 800 v cc = 3.3v 06766-008 figure 9. power supply current vs. load capacitance
adm3101e rev. c | page 7 of 12 5v/di v 5v/di v time (1s/div) 2 1 v cc = 3.3v load = 3k ? and 1nf 06766-009 figure 10. 460 kbps data transmission 5.0 0 3.0 5.5 v cc (v) t in voltage thresholds (v) 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 3.5 4.0 4.5 5.0 06766-010 figure 11. t in voltage threshold vs. v cc
adm3101e rev. c | page 8 of 12 theory of operation the adm3101e is a single-channel rs-232 line driver/receiver. step-up voltage converters, coupled with level shifting trans- mitters and receivers, allow rs-232 levels to be developed while operating from a single 3.3 v supply. cmos technology is used to keep the power dissipation to an absolute minimum, allowing maximum battery life in portable applications. circuit description the internal circuitry consists of the following main sections: ? a charge pump voltage converter ? a 3.3 v logic to an eia/tia-232e transmitter ? an eia/tia-232e to a 3.3 v logic receiver adm3101e gnd +3.3v inpu t + + + c1 0.1f 16v c2 0.1f 16v + + t r +3.3v to +6.6v voltage doubler +6.6v to ?6.6v voltage inverter c1+ c1? c2+ c2? t in r out cmos input cmos output r in v cc v+ v? t out c5 0.1f c3 0.1f 6.3v c4 0.1f 16v eia/tia-232e output eia/tia-232e input* *internal 5k ? pull-down resistor on the rs-232 input. 0 6766-011 figure 12. typical operating circuit charge pump voltage converter the charge pump voltage converter consists of a 200 khz oscil- lator and a switching matrix. the converter generates a 6.6 v supply (when unloaded) from the 3.3 v input level. this is achieved in two stages by using a switched capacitor technique, as illustrated in figure 13 and figure 14 . first, the 3.3 v input supply is doubled to +6.6 v by using c1 as the charge storage element. the +6.6 v level is then inverted to generate ?6.6 v using c2 as the storage element. c3 is shown connected between v+ and v cc but is equally effective if connected between v+ and gnd. the c3 and c4 capacitors are used to reduce the output ripple. the values are not critical and can be increased, if desired. larger capacitors (up to 10 f) can also be used in place of the c1, c2, c3, and c4 capacitors. gnd c3 c1 s1 s2 s3 s4 v+ = 2v cc + + internal oscillator v cc v cc 06766-012 figure 13. charge pump voltage doubler gnd c4 c2 s1 s2 s3 s4 gnd + + internal oscillator v+ v? = ?(v+) from voltage doubler 06766-013 figure 14. charge pump voltage inverter 3.3 v logic to eia/tia-232e transmitter the transmitter driver converts the 3.3 v logic input levels into rs-232 output levels. when driving an rs-232 load with v cc = 3.3 v, the output voltage swing is typically 6 v. internally, the t in pin has a weak pull-up that allows it to be driven by an open-drain output, but the maximum operating data rate is reduced when the t in pin is driven by an open-drain pin. eia/tia-232e to 3.3 v logic receiver the receiver is an inverting level shifter that accepts the rs-232 input level and translates it into a 3.3 v logic output level. the input has an internal 5 k pull-down resistor to ground and is protected against overvoltages of up to 30 v. an unconnected input is pulled to 0 v by the internal 5 k pull-down resistor, which, therefore, results in a logic 1 output level for an uncon- nected input or for an input connected to gnd. the receiver has a schmitt trigger input with a hysteresis level of 0.4 v, which ensures error-free reception for both a noisy input and for an input with slow transition times. cmos input voltage thresholds the cmos input and output pins (t in and r out ) of the adm3101e are designed to interface with 1.8 v logic thresholds when v cc = 3.3 v. the cmos input and output pins (t in and r out ) of the adm3101e are also designed to interface with ttl/cmos logic thresholds when v cc = 5 v. esd protection on rs-232 and cmos i/o pins all rs-232 (t out and r in ) and cmos (t in and r out ) inputs and outputs are protected against electrostatic discharges (up to 15 kv). high baud rate the adm3101e features high slew rates, permitting data trans- mission at rates well in excess of the eia/rs-232 specifications. the rs-232 voltage levels are maintained at data rates of up to 460 kbps, even under worst-case loading conditions, when t in is driven by a push-pull output. the slew rate is internally controlled to less than 30 v/s to minimize emi interference.
adm3101e rev. c | page 9 of 12 outline dimensions * compliant to jedec standards mo-220-veed-1 except for exposed pad dimension. * 1.45 1.30 sq 1.15 050808-b 1 0.50 bsc 0.75 0.60 0.50 0.25 min top view 12 max 0.80 max 0.65 typ 1.00 0.85 0.80 0.30 0.23 0.18 0.05 max 0.02 nom 0.20 ref 12 4 10 6 7 9 3 coplanarity 0.08 exposed pad (bottom view) s eating plane 3.15 3.00 sq 2.85 2.95 2.75 sq 2.55 pin 1 indicator 0.60 max 0.60 max pin 1 indicator * paddle connected to gnd. this connection is not required to meet the electrical performances. figure 15. 12-lead lead frame chip scale package [lfcsp_vq] 3 mm 3 mm body, very thin quad (cp-12-1) dimensions shown in millimeters compliant to jedec standards mo-137-ab 012808-a controlling dimensions are in inches; millimeters dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. 16 9 8 1 seating plane 0.010 (0.25) 0.004 (0.10) 0.012 (0.30) 0.008 (0.20) 0.025 (0.64) bsc 0.041 (1.04) ref 0.010 (0.25) 0.006 (0.15) 0.050 (1.27) 0.016 (0.41) 0.020 (0.51) 0.010 (0.25) 8 0 coplanarity 0.004 (0.10) 0.065 (1.65) 0.049 (1.25) 0.069 (1.75) 0.053 (1.35) 0.197 (5.00) 0.193 (4.90) 0.189 (4.80) 0.158 (4.01) 0.154 (3.91) 0.150 (3.81) 0.244 (6.20) 0.236 (5.99) 0.228 (5.79) figure 16. 16-lead shrink small outline package [qsop] (rq-16) dimensions shown in inches ordering guide model temperature range package de scription package option branding adm3101eacpz-reel 1 ?40c to +85c 12-lead lead frame chip scale package [lfcsp_vq] cp-12-1 ma6 adm3101eacpz-250r7 1 C40c to +85c 12-lead lead frame chip scale package [lfcsp_vq] cp-12-1 ma6 adm3101earqz 1 C40c to +85c 16-lead shrink small outline package [qsop] rq-16 adm3101earqz-reel 1 C40c to +85c 16-lead shrink small outline package [qsop] rq-16 1 z = rohs compliant part.
adm3101e rev. c | page 10 of 12 notes
adm3101e rev. c | page 11 of 12 notes
adm3101e rev. c | page 12 of 12 notes ?2007C2008 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d06766-0-7/08(c)

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